1. Field of the Invention
The present invention relates to a packet communication system which is suitable for a high speed bus, and a method of controlling the system.
2. Description of the Related Art
FIG. 1 shows a prior art packet communication system, in which n terminals (TEs) 11-1 to 11-n are connected with associated terminal interfaces (TE-IFs) 12-1 to 12-n which in turn are connected to a common data bus 13.
With such an arrangement, transmission data from the respective terminals 11-1 to 11-n are, at the associated terminal interfaces 12-1 to 12-n, resolved into packets of a predetermined data unit (for example, a packet of 64 bytes). The packets have destination terminal interface addresses (DLAs) as destination data attached, have a header (BAH) for acquiring the exclusive occupation authority of the data bus 13 attached, and then are output to the bus 13 in synchronism with the output timing of the bus 13.
Packets transmitted to the data bus 13, on the other hand, are commonly received at the respective terminal interfaces 12-1 to 12-n where the destination data (DLA) of the received packets are checked. If a terminal interface finds its own destination data, then the terminal interface deletes the DLA of the received packet and sends only the data part indicative of the communication contents in the packet to the associated terminal.
In such conventional systems, some of the terminals 11-1 to 11-n sometimes generate data transmission requests at the same time. The terminal interfaces 12-1 to 12-n associated with the terminals 11-1 to 11-n are connected to the common data bus 13. Thus, when data transmission requests from more than one of the terminals 11-1 to 11-n occur, each of the terminals exclusively occupy the data bus 13 only during its data transmission. To this end, contention control is carried out over the data bus 13 by use of a header BAH.
During contention control, a packet transmission authority, i.e., the exclusive occupation authority, is given to a highest-priority one of the terminal interfaces that have transmitted packets at the same time. A priority order is established for the respective terminal interfaces 12-1 to 12-n and a unique number indicative of the priority order is set in the header BAH. In more detail, the terminal interface that desires to perform data transmission outputs the header BAH onto the bus 13 in synchronism with a bus timing clock CCCK shown in a timing chart of FIG. 5. The terminal interface in question then examines the headers BAHs on the bus 13 and determines the presence or absence of the header BAHs issued from the terminal interface or interfaces having priority higher than its own priority.
If the terminal interface in question detects the header(s) BAH(s) issued from the terminal interface(s) having priority higher than its own, then it stops the transmission of the part of the packet subsequent to the address data (DLA) and waits for the transmission until the next cycle. When the terminal interface in question fails to detect any header BAH issued from a terminal interface having priority higher than its own, it acquires the exclusive occupation authority of the bus 13 and transmits its packet. Accordingly, it is only a highest-priority one of the terminal interfaces that issues their packets at the same time that can output its packet at the stage of the completion of transmission of the header BAH.
Shown in FIGS. 2a-2b are a timing chart that shows packet transmission timing. A reference numeral 14 denotes a bus timing clock signal CCCK. A reference numeral 15 denotes a header (BAH) for contention control of the bus 13. A reference numeral 16 denotes the address (DLA) of a party (destination) terminal interface. A reference numeral 17 denotes a data corresponding to one data transmission cycle from a high level of the bus timing clock CCCK to the next high level thereof.
When one of the terminals 11-1 to 11-n generates a data transmission request, the terminal interface connected to the terminal in question, as shown in FIG. 2, attaches a DLA 16 of one byte and a header BAH 15 of three bytes (consisting of BAH0 to BAH3) to the data 17 of a 64-byte unit (consisting of D0 to D63) to create a 68-byte packet, and then outputs the packet onto the bus 13 in synchronism with the bus timing clock signal CCCK. At this time, if some of the remaining terminal interfaces also output their packets to the bus 13 simultaneously with the packet output of the terminal interface in question, the contention control described above is carried out.
Assume now, as a simple example, that a total of 8 terminals 11-1 to 11-8 are provided, as shown in FIG. 3, that the data bus 13 is an 8 bit bus, and that numbers n (n=0 to 7) indicative of priorities are given as their headers BAHs to the respective terminal interfaces 12-1 to 12-8. The header BAH given to each of the terminal interfaces has a hexadecimal digit of a decimal digit 2.sup.n, where n is the priority number. Thus, the terminal interface 12-1 having a priority number 0 has a header BAH of (01)h, and the terminal interface 12-8 having a priority number 7 has a header BAH of (80)h. The respective terminal interfaces 12-1 to 12-8, when starting the data transmission cycle of the bus timing clock signal CCCK, outputs to the data bus 13 their data starting with the header BAH followed by the DLA and the data. At this time, because the bus 13 is driven by an open-collector driver provided in the each terminal interface, when all the 8 terminal interfaces 12-1 to 12-8 generate transmission requests at the same time, the data on the bus 13 become (FF)h and the data values are taken by the respective terminal interfaces.
Because one of the terminal interfaces having the smallest header BAH can acquire packet transmission authority, the terminal interface 12-1 having a number 0 and thus having a header of (01)h (having "1" at the lowest bit position) can acquire the transmission authority and can transmit its packet onto the bus 13.
As described above, in prior art packet communication systems, the plurality of terminal interfaces 12-1 to 12-n are connected to the common data bus 13 and contention control for acquiring the exclusive occupation authority of the bus 13 is carried out by use of the data bus 13 for packet transmission. For this reason, contention control must be terminated in the output period of the header BAH in the former half of the one data transmission cycle.
In practical applications, however, approximately 512 terminal interfaces are provided and the header BAH consists of 3 bytes. In this case, if the bus operational rate is 8 MHz, then the transfer cycle for one byte becomes 125 ns. As a result, contention control must be terminated in a time period of 375 ns (=125 ns.times.3). When the bus operational rate increases, contention control must be processed in a further shorter time, which means that an increase of the bus operational rate is restricted by the contention control time.